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Differentiate Between Channeled & Channel Less Gate Array? |
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Answer» Channeled GATE Array: Only the interconnect is customized. The interconnect uses predefined spaces between rows of base cells. ROUTING is done using the spaces. Logic density is less CHANNEL less Gate Array: Only the top few mask LAYERS are customized. No predefined AREAS are set aside for routing between cells. Routing is done using the area of transistors unused. Logic density is higher. Channeled Gate Array: Only the interconnect is customized. The interconnect uses predefined spaces between rows of base cells. Routing is done using the spaces. Logic density is less Channel less Gate Array: Only the top few mask layers are customized. No predefined areas are set aside for routing between cells. Routing is done using the area of transistors unused. Logic density is higher. |
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