On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________(a) The clock pulse is LOW(b) The clock pulse is HIGH(c) The clock pulse transitions from LOW to HIGH(d) The clock pulse transitions from HIGH to LOWThe question was posed to me during an interview for a job.Enquiry is from Flip Flops in portion Flip-Flops of Digital Circuits

On a positive edge-triggered S-R flip-flop, the outputs reflect the in

1.	On a positive edge-triggered S-R flip-flop, the outputs reflect the input condition when ________(a) The clock pulse is LOW(b) The clock pulse is HIGH(c) The clock pulse transitions from LOW to HIGH(d) The clock pulse transitions from HIGH to LOWThe question was posed to me during an interview for a job.Enquiry is from Flip Flops in portion Flip-Flops of Digital Circuits
Answer» Correct option is (C) The clock PULSE TRANSITIONS from LOW to HIGH Easy explanation: Edge triggered device will follow when there is transition. It is a positive edge triggered when transition takes place from low to high, while, it is NEGATIVE edge triggered when the transition takes place from high to low.

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