If An Oscillatory Circuit Is There; What Happens During (a) Rtl Synth – InterviewSolution

1.

If An Oscillatory Circuit Is There; What Happens During (a) Rtl Synthesis (b) Simulation?

Answer»

During the RTL synthesis, the synthesis tool will GIVE a WARNING during synthesis about the COMBINATORIAL feedback loop.
During the simulation the simulation will get STOPPED SAYING the Iteration limit reached.

Discussion

No Comment Found

Related InterviewSolutions

Are The Following Codes Are Synthesizable ? Is There Any Difference In The Synthesis Result Of (i) And (ii)?< (i) Always @ (posedge Clk1 Or Negedge Clk2) Begin If (!clk2 && A) Dout <= 0; Else Dout<= Din; End (ii)
Is The Following Code Synthesizable? Always @ (posedge Clk1 Or Negedge Clk2) Begin If (!clk2) Dout <= 0; Else Dout<= Din; End
Tell The Scenarios Where Synthesis Error Occurs.?
If No Parameters In The Always Sensitivity List, How The Always Block Executes?
Is There A Latch In The Following Code? What If The “sel” Value Is “x”. What Will Be The Simulation Result? Always @ ( En ) Begin Dout = 0 Case ( Sel ) 0: Dout = In ; Default : Dout = 1; End
Is There A Latch In The Following Code? What If The “sel” Value Is “x”. What Will Be The Simulation Result? Always @ ( En ) Begin Dout = 0 Case ( Sel ) 0: Dout = In ; End
What Will Be The Output Of The Following Code? Always ( * ) Begin A = B + D; A = C + B; End
Why We Use B.a (blocking Assignments) And N.b.a (non Blocking Assignments)?
What Can Be Done To Break The Combinational Loop?
Where Can We Use Linting Tools ? Can We Use Them To Debug Syntax?